Single-ended, ultra low voltage class AB power amplifier architecture having a common-mode feedback quiescent current control circuit

摘要

A single-ended, ultra low voltage class AB power amplifier (100) including an input gain stage (102), output gain stage (104), a quiescent current control circuit (106) and a output stage bias reference circuit (108). The input gain stage (102) includes differential inputs (IN^−, IN^+) and differential outputs (A₁, B₁). The output stage (104), having control transistors, connects to each differential output (A₁, B₁) of the input stage (102). and a quiescent current control circuit (106) deriving common mode feedback control signal (V_CS1) from the differential outputs (A₁, B₁) and voltage bias node (D₁). A quiescent current control circuit (106) derives the common mode feedback control signal (V_CS1) to maintain the voltage of the input gain stage transistors (M₃, M₄) at a desired level. The quiescent current control circuit (106) uses the bias voltage (V_D1) supplied by an output stage bias reference (108) coupled thereto for generating the control signal (V_CS1) to be applied to the gates of the input stage transistors (M₃, M₄), thereby maintaining the quiescent current of the output transistors (M₇, M₈) at a desired value.