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Fault propagation path estimating method, fault propagation path estimating apparatus and recording media

机译:故障传播路径估计方法,故障传播路径估计设备和记录介质

摘要

A gate connected to an input side of a normal signal line estimated-as in a logical state equal to an expected value with an implication operation is detected as a newly implication-capable gate, and a signal line on an output side of a gate estimated as in a logical state equal to the expected value with an implication operation for the implication-capable gate is initialized to a logical state before the implication operation. A signal line in which a logical contradiction occurs in the logical state estimated with the implication operation is registered, and the number of occurrences thereof is recorded. Additionally, the result of the implication operation is stored as history information, and when the number of occurrences of logical contradictions exceeds an allowable number, the history information is traced to initialize a logical state of a signal line causing the logical contradiction to a state before the implication operation until the number falls within the allowable number.
机译:检测到连接到正常信号线的输入侧的门,该逻辑门通过蕴含操作以等于期望值的逻辑状态被检测为新的具有隐含能力的门,并且估计在栅极的输出侧上的信号线在具有隐含能力门的隐含操作的逻辑状态下,逻辑状态等于期望值,在隐含操作之前将其初始化为逻辑状态。记录信号线,在该信号线中,通过蕴涵操作估计出的逻辑状态发生逻辑矛盾,并记录其出现次数。另外,暗示操作的结果被存储为历史信息,并且当逻辑矛盾的出现次数超过允许次数时,追踪历史信息以将引起逻辑矛盾的信号线的逻辑状态初始化为之前的状态。暗示操作,直到该数字落在允许的数字内。

著录项

  • 公开/公告号US6560738B1

    专利类型

  • 公开/公告日2003-05-06

    原文格式PDF

  • 申请/专利权人 NEC ELECTRONICS CORPORATION;

    申请/专利号US20000605737

  • 发明设计人 KAZUKI SHIGETA;

    申请日2000-06-29

  • 分类号G06F110/00;H04B170/00;

  • 国家 US

  • 入库时间 2022-08-22 00:04:11

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