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A DESIGN ANALYSIS +WORKSTATION (DAW) FOR ANALYZING AN INTEGRATED CIRCUIT

机译:用于分析集成电路的设计分析+工作站(DAW)

摘要

A design analysis workstation (220) for performing design analysis of integrated circuits provides facilities for extracting design and layout information from digital image-mosaics (238) captured during deconstruction of an integrated circuit (110). Each image-mosaic is displayed in at least one mosaic-view (262) as a background image that is overlaid with at least one annotation overlay (304). An engineer analyst creates annotation objects (322) on the annotation overlay based on information inferred concurrently from one or more image-mosaics. The annotation objects have properties that are editable. Concurrent display of a plurality of image-mosaics facilitates an understanding of interrelations between components on different layers..
机译:用于执行集成电路的设计分析的设计分析工作站(220)提供了用于从在解构集成电路(110)期间捕获的数字图像马赛克(238)提取设计和布局信息的设施。将每个图像马赛克显示在至少一个马赛克视图(262)中,作为覆盖有至少一个注释叠加层(304)的背景图像。工程师分析者基于从一个或多个图像马赛克同时推断出的信息,在注释叠加层上创建注释对象(322)。注释对象具有可编辑的属性。多个图像马赛克的并发显示有助于理解不同层上组件之间的相互关系。

著录项

  • 公开/公告号IN2003KN00467A

    专利类型

  • 公开/公告日2003-02-10

    原文格式PDF

  • 申请/专利权人

    申请/专利号IN00467/KOLNP/2003

  • 申请日2003-04-16

  • 分类号G06F17/50;G06T7/00;G06F9/455;H01L21/66;

  • 国家 IN

  • 入库时间 2022-08-22 00:02:27

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