Operation processor, building method, operation processing system, and operation processing method

摘要

As shown in FIG. 1, this operation processor comprises a register array (11) that has a plurality of registers each holding any value according to the write address Aw and the write control signal Sw and outputting a value according to the read address Ar; an ALU (12) that performs calculation on the value, a decoder (13) that decodes an operation instruction included in an operation program AP that allows the ALU (12) to operate; and an instruction execution control unit (50) that controls the register array (11) and the ALU (12) to execute this operation instruction. The instruction execution control unit (50) selects one of the registers according to the operation instruction and, according to the value held in the register, executes register-relative register addressing processing to select another register.