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METHODS AND APPARATUS FOR PERFORMING FAST DIVISION OPERATIONS IN BIT-SERIAL PROCESSORS
METHODS AND APPARATUS FOR PERFORMING FAST DIVISION OPERATIONS IN BIT-SERIAL PROCESSORS
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机译:在位串行处理器中执行快速除法运算的方法和装置
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摘要
Methods and apparatus for quickly dividing multiple-bit operands using bit-serial processors include strategies for eliminating the number of steps required to execute conventional division operations. According to an exemplary embodiment, a conditional subtraction step, based on a quotient bit computed during a given pass, is combined with a compare step which is used to compute a next quotient bit and which, according to conventional techniques, is ordinarily computed during a subsequent pass. Additionally, exemplary embodiments provide a zero/non-zero mask for denominator bits which extend beyond current most signficant remainder bit during a given pass. As a result, not all denominator bits need be considered during every pass. Advantageously, the methods and apparatus of the invention can provide approximately a 3 to 1 speed improvement as compared to conventional techniques.
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