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Task-based hardware architecture for maximization of intellectual property reuse
Task-based hardware architecture for maximization of intellectual property reuse
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机译:基于任务的硬件体系结构,可最大限度地利用知识产权
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摘要
A task-based chip-level hardware architecture. The architecture includes a task manager for managing a task with task information, and a task module operatively connected to the task manager for performing the task in accordance with the task information.
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