DEVICE AND METHOD PERFORMING A LEADING ZERO DETERMINATION ON AN OPERAND

摘要

Device 20, which performs a continuous clear bit of the operand that is an offset coefficient comprises a plurality of logic circuits (22a-h) associated with the priority selected for a portion of each operand logic circuit. Each logic circuit (22a-h) operates the all zero signal to configure all of the respective portions of the logic circuit of the operand zero, performing the leading zero coefficient in each portion of the logic circuit of the operand, the logic circuit by a leading zero coefficient first portion and offsetting of the offset to generate the leading zero signal. In addition, the priority encoder 24 has the highest priority ratio and activity come generating a signal encoding the priority of the zero signal, MUX 26, 28 is the highest priority inactive all the leading zero signal associated with a zero signal respectively, is selected according to the code signal is the priority of the first portion and the second portion to the first portion and the carry-out signal of the selector section consecutive clear bits count. Further, the adder 32 and 34 are first, by the priority encoded signal a second part and offsetting the offset no-carry-out sinhoeul generate and, priority of the second portion of the code signal offset and off set to '1 by adding 'to generate the carry-out signal. Then, the MUX 30 selects one of the no-carry-out signal and the carry-out signal in a second portion of a continuous clear bit coefficient selector according to the carry-out signal.