MEMORY CONTROL SYSTEM WITH INCREMENTER FOR GENERATING SPECULATIVE ADDRESSES

摘要

The memory controller includes an increment to predict the next address to be asserted by the processor agent. The incrementer, structurally speaking the counter is configured to have the predicted address to wrap (wrap) in a lab boundary and if the memory is to be a method to display a page when crossing a page boundary. This incremental groups or in the case of the loop address if the successor address present on the different pages, or even provide an accurate prediction in some cases a successor address that is not continuous. Thus, the increase in the number of correct address prediction to improve the overall performance. The present invention can be applied to a signal processing application with the instruction loop crossing a particular one or more page boundaries.