ADVANCED TAP LINKING MODULE APPARATUS FOR TESTING SYSTEM ON CHIP COMPRISING IP CORES

摘要

PURPOSE: A tap linking module(TLM) apparatus is provided to reduce design time by using IEEE 1149.1 as a standard for board testing without modification, and to perform an individual IP core test, connection checking between IP cores and chip testing. CONSTITUTION: A TLM is placed at a lower part of a system-on-chip on a board, and receives signals(TMS,TRST,TDO) to provide signals(SCE_EN,ENA,Reset) so as to dynamically control connections of respective TAPs. State condition expanders(SCE1,SCE2,SCE3,SCE4) are supplied with signals(SCE_EN,ENA) from the TLM. The state condition expanders(SCE1,SCE2,SCE3,SCE4) provide to respective TAP TMS signals for activating or inactivating respective TAPs(TAP1,TAP2,TAP3,TAP4) so as to have the same state transition as the TLM.