Semiconductor chip having electrode pad arrangement suitable for chip stacking and a chip stacked package device comprising such chips

摘要

PURPOSE: A semiconductor chip having electrode pad arrangement suitable for chip stacking and a chip stacked package device comprising such chips are provided to stack easily various chips by arranging a plurality of electrode pads on only one side. CONSTITUTION: The second semiconductor chip(20) is stacked on the first semiconductor chip(10). A plurality of signal electrode pads(16,18) of the first semiconductor chip(10) and a plurality of signal electrode pads(26,28) of the second semiconductor chip(20) are arranged toward the same direction. The signal electrode pads(16,18) of the first semiconductor chip(10) are not covered with the signal electrode pads(26,28) of the second semiconductor chip(20). A plurality of test electrode pads of the first semiconductor chip(10) and a plurality of test electrode pads(22,24) of the second semiconductor chip(20) are arranged toward the same direction. The test electrode pads of the first semiconductor chip(10) are covered with the test electrode pads(22,24) of the second semiconductor chip(20). The first semiconductor chip(10) is adhered on a die pad(40) of a lead frame. A conductive lead is connected with the signal electrode pads(16,18,26,28) by a bonding wire(30).