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Direct digital frequency synthesizer using linear interpolator and counter and frequency synthesizing method thereof

机译:使用线性内插器和计数器的直接数字频率合成器及其频率合成方法

摘要

PURPOSE: A DDFS(Direct Digital Frequency Synthesizer) using a linear interpolator and a counter and a method for synthesizing frequencies is provided to reduce a size of a ROM lookup table by using the linear interpolator and the counter. CONSTITUTION: A DDFS includes an accumulator(110), a ROM lookup table(120), a counter(130), an adder(140), a linear interpolator(150), and a multiplexer(160). The accumulator generates a phase control signal having a constant phase value according to an external digital signal. The ROM lookup table is used for storing the first amplitude value of the phase control signal. The counter is used for counting the second amplitude value of the phase control signal according to a phase value of the phase control signal. The adder is used for outputting an even sine value by adding the second amplitude value to the first amplitude value. The linear interpolator is used for interpolating an odd sine value on the basis of the even sine value. The multiplexer is used for generating an accurate sine value by multiplexing the even sine value and the odd sine value in response to the least significant bit received from the accumulator.
机译:目的:提供一种使用线性内插器和计数器的DDFS(直接数字频率合成器)以及一种用于合成频率的方法,以通过使用线性内插器和计数器来减小ROM查找表的大小。组成:DDFS包括一个累加器(110),一个ROM查找表(120),一个计数器(130),一个加法器(140),一个线性内插器(150)和一个多路复用器(160)。累加器根据外部数字信号产生具有恒定相位值的相位控制信号。 ROM查找表用于存储相位控制信号的第一幅度值。计数器用于根据相位控制信号的相位值对相位控制信号的第二幅度值进行计数。加法器用于通过将第二幅度值与第一幅度值相加来输出偶数正弦值。线性插值器用于根据偶数正弦值对奇数正弦值进行插值。复用器用于响应于从累加器接收到的最低有效位,通过对偶数正弦值和奇数正弦值进行复用来生成准确的正弦值。

著录项

  • 公开/公告号KR20030053761A

    专利类型

  • 公开/公告日2003-07-02

    原文格式PDF

  • 申请/专利权人 HYNIX SEMICONDUCTOR INC.;

    申请/专利号KR20010083751

  • 发明设计人 CHO SANG WAN;

    申请日2001-12-24

  • 分类号H03L7/00;

  • 国家 KR

  • 入库时间 2022-08-21 23:46:45

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