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METHOD AND APPARATUS FOR STOPPING A BUS CLOCK WHILE THERE ARE NO ACTIVITIES PRESENT ON A BUS
METHOD AND APPARATUS FOR STOPPING A BUS CLOCK WHILE THERE ARE NO ACTIVITIES PRESENT ON A BUS
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机译:在公交车上没有活动的情况下停止公交车时钟的方法和装置
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摘要
A method and apparatus for stopping a bus clock when there are no activities present on a bus. In the illustrated embodiment, an AGP bus couples a graphics controller to core logic to transfer data between the two devices. A controller generates a first (AGP bus) clock signal CLK and a second (internal) clock signal iclk for the first and second devices. If the controller determines that there are no graphics activities on the AGP bus (i.e., the bus is idle), the controller issues a stop request to stop the internal clock signal iclk. The processing of the stop request is delayed for a period of seven cycles on the AGP bus clock CLK to await for an objection from either the graphics controller or the core logic. If an objection is received during the seven cycle delay, the internal clock iclk will not be stopped, and will continue to run. However, if an objection is not received, then the internal clock iclk will stop. If the graphics controller is in a low power or "sleep" state, the AGP bus clock CLK is stopped, thereby conserving power.
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