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Fabrication of integrated circuit by reversing the doping of first section of lower conductive layer of interconnect to second conduction type, and etching lower conductive layer second section with first section as etching stop
Fabrication of integrated circuit by reversing the doping of first section of lower conductive layer of interconnect to second conduction type, and etching lower conductive layer second section with first section as etching stop
An integrated circuit is fabricated by: (i) reversing the doping of first section(s) of a lower conductive layer of interconnect to a second conduction type, and (ii) selectively etching a second section of the lower conductive layer of first conduction type by an etching process with the first section as an etching stop. Fabrication of an integrated circuit involves preparing a substrate (1) with an electrically insulating layer (2) above it, providing an interconnect (WL) with lower and upper conductive layers (3, 4), embedding the interconnect in an electrically insulating structure (5, 8), at least partially uncovering a second section of the lower conductive layer, and removing the second section by an etching process. The lower conductive layer comprises silicon of a first conduction type. The doping of first section(s) of the lower conductive layer is reversed to a second conduction type and the second section of the lower conductive layer of first conduction type is selectively etched by an etching process with the first section as an etching stop.
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