Paged memory access attributes control method e.g. for DRAM, involves checking fast page lookup table and TLB based on memory page attributes, to configure memory for performing specified operations

摘要

The memory attributes comprising configurations of starting and terminating addresses of specific area, and the number and size of memory page are defined, based on which fast page lookup table (FPLT) and table of look-aside buffer (TLB) are set. The FPLT and TLB are checked based on attributes to configure memory (11) to perform read only, write only, read and write, read redirect and write redirect processes. An Independent claim is included for paged memory access attributes controlling structure.