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Power semiconductor switch turn-off performance optimization method, by dropping gate-emitter voltage e.g. of IGBT in two stages
Power semiconductor switch turn-off performance optimization method, by dropping gate-emitter voltage e.g. of IGBT in two stages
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机译:通过降低栅极发射极电压(例如)降低功率半导体开关的关断性能优化方法IGBT分为两个阶段
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摘要
When a switch-off signal arrives, the gate-emitter voltage (UGE) of the power semiconductor switch (IGBT) is dropped in two stages. Firstly, the gate-emitter voltage is dropped to a level (U2) which causes a collector-emitter forward voltage that is increased by a predetermined value. Then, the gate-emitter voltage is dropped to the final switch-off value (U3). Independent claims are also included for: (1) an apparatus for carrying out the method; (2) a hard-switching power converter.
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