Transfer network for addition of two bit groups such that circuit performance is enhanced and adding speed improved by use of a redundant logic circuit solely comprising NAND gates and inverters

摘要

Method for generating a transfer signal (cy) from a transfer network (2) that is for adding two bit groups together (A, B) in an adder circuit, whereby the transfer network is implemented as a static hardware circuit. The circuit is based on a redundant logic circuit comprised solely of NAND gates (AI) and inverters (I). A further transfer path does not have inverters.