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Isolation methods for active zones of a semiconductor substrate with shallow planarized trench

机译:具有浅平坦沟槽的半导体衬底的有源区的隔离方法

摘要

The device a semi - conductor comprises, in a semi - conductive substrate (1) at least one predetermined region of the substrate (6) intended to subsequently form an active zone, open at its upper surface and is situated between the lateral trenches (7) containing an insulating material comprising at least one layer of a so-called in accordance with the insulating material forming, on either side of said predetermined region of the substrate of the invention, a boss (16) on the plane upper surface of the device. The height of the bump is less than 1000 a and the insulating material may also comprise the planarising oxide.
机译:一种半导体器件,在半导体衬底(1)中包括衬底(6)的至少一个预定区域,该区域预定用于随后形成有源区,该预定区域在其上表面敞开并位于横向沟槽(7)之间。 )包含一种绝缘材料,该绝缘材料包括至少一层所谓的绝缘材料,该绝缘材料根据本发明的基板的所述预定区域的任一侧在器件的平面上表面上形成凸台(16) 。凸块的高度小于1000a,并且绝缘材料还可以包括平坦化氧化物。

著录项

  • 公开/公告号DE69528099T2

    专利类型

  • 公开/公告日2003-06-05

    原文格式PDF

  • 申请/专利权人 FRANCE TELECOM PARIS;

    申请/专利号DE1995628099T

  • 发明设计人 PAOLI MARYSE;HAOND MICHEL;BROUQUET PIERRE;

    申请日1995-03-10

  • 分类号H01L21/762;

  • 国家 DE

  • 入库时间 2022-08-21 23:39:50

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