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FAILURE ANALYSIS SYSTEM FOR LOGIC LSI AND FAILURE ANALYSIS METHOD

机译:逻辑LSI的故障分析系统及故障分析方法

摘要

PROBLEM TO BE SOLVED: To provide a failure analysis system for a logic LSI and a failure analysis method, which properly reproduce the failure, and which facilitate the analysis on the relevance of the true failure to the detected failure.;SOLUTION: The failure analysis system for the logic LSI having built-in software includes a function for recording terminal signal information of the logic LSI in synchronization with a clock, a function for reproducing the recorded terminal signal information in synchronization with the clock, a function for comparing the reproduced terminal signal information with terminal signal information of a normal logic LSI, and a function for generating a trace differential map between a trace data map for the logic LSI to be analyzed and a trace data map of the normal logic LSI.;COPYRIGHT: (C)2004,JPO
机译:要解决的问题:提供一种用于逻辑LSI的故障分析系统和一种故障分析方法,可以正确地再现故障,并有助于分析真实故障与检测到的故障之间的相关性。具有内置软件的逻辑LSI的系统包括:与时钟同步地记录逻辑LSI的端子信号信息的功能,与时钟同步地再现记录的端子信号信息的功能,比较再现的端子的功能信号信息与常规逻辑LSI的终端信号信息一起使用,以及用于在要分析的逻辑LSI的跟踪数据图与常规逻辑LSI的跟踪数据图之间生成跟踪差分图的功能.COPYRIGHT:(C) 2004年

著录项

  • 公开/公告号JP2004101203A

    专利类型

  • 公开/公告日2004-04-02

    原文格式PDF

  • 申请/专利权人 OKI ELECTRIC IND CO LTD;OKI MICRO DESIGN CO LTD;

    申请/专利号JP20020259280

  • 发明设计人 KONDO TAKAYUKI;

    申请日2002-09-04

  • 分类号G01R31/28;G06F11/22;

  • 国家 JP

  • 入库时间 2022-08-21 23:30:07

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