Method and the device for simultaneous differential data perception and the capture in high-speed memory

摘要

The difference input step circuit in order the differential data perception and capture circuit has the 1st and 2nd output node, to receive each one of the aforementioned differential data signal is included. In order 1st and 2nd complimentary input to receive the signal from each one the description above of the 1st and 2nd output node, it is connected, it can provide the latch element. As for the gate circuit, in order to be able to hold down the electricity consumption of the aforementioned difference input step, responding to the enabling signal, enabling and deisueburu it does the clock pulse to the difference input step dynamically. With further execution example, as for the enabling signal it is the complimentary clock input signal.