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Method and device for generating a local clock using universal serial bus (USB) downstream received signals DP and DM

机译:使用通用串行总线(usb)下游接收信号dp和dm产生本地时钟的方法和装置

摘要

A method and device is disclosed for generating a local clock signal CLK1X (172) from Universal Synchronous Bus downstream-received differential signals DM and DP carrying the downstream received bit-serial signal. The method and device does not require the use of a crystal or resonator. Counters (312, 310, 305, 301) are used to determine a number of periods of a free-running high frequency clock signal (164) contained within in a known number of bit periods of the downstream received bit-serial signal (146). The counter values are divided by the known number of bit periods of the received bit-serial signal (146) to determine a bit period of the received bit-serial signal (146). The local clock signal (172) may be phase-locked with the received bit serial signal (146). The local clock period is updated on an ongoing manner by downstream known received traffic.
机译:公开了一种用于从通用同步总线的下游接收的差分信号DM和DP产生本地时钟信号CLK1X(172)的方法和设备,该差分信号DM和DP携带下游接收的比特串行信号。该方法和设备不需要使用晶体或谐振器。计数器(312、310、305、301)用于确定包含在下游接收的比特串行信号(146)的已知数目的比特周期内的自由运行的高频时钟信号(164)的周期数目。 。将计数器值除以接收到的比特串行信号(146)的比特周期的已知数目,以确定接收到的比特串行信号(146)的比特周期。本地时钟信号(172)可以与接收到的比特串行信号(146)锁相。本地时钟周期由下游已知的接收流量持续更新。

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