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Low voltage swing bus analysis method using static timing analysis tool
Low voltage swing bus analysis method using static timing analysis tool
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机译:使用静态时序分析工具的低压摆线母线分析方法
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摘要
A low voltage swing bus analysis method using a static timing analysis (STA) tool, which provides simple and accurate timing analysis verification. The low voltage swing bus analysis method is used in a static timing analysis (STA) tool. The STA tool receives a design file which executes the timing verification program then extracts the timing model for each cell, present in a design file during execution of the timing verification program, and calculates a timing for each node. The STA tool extracts a timing model for a sense amplifying flip flop, among cells present in the design file during execution of the timing verification program, from execution of a subroutine and calculating a timing for each node connected to the sense amplifying flip flop. The STA tool outputs the calculated timings.
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