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Limit-cycle-free FIR/IIR halfband digital filter with shared registers for high-speed sigma-delta A/D and D/A converters
Limit-cycle-free FIR/IIR halfband digital filter with shared registers for high-speed sigma-delta A/D and D/A converters
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机译:带有共享寄存器的无极限周期FIR / IIR半带数字滤波器,用于高速sigma-delta A / D和D / A转换器
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摘要
A multiplexed FIR/IIR digital filter structure (300) which offers linear phase response and low group delay by switching on a FIR filter portion (31) or a IIR filter portion (32). To reduce the silicon area, the FIR/IIR filter (300) shares registers which is enabled because the FIR and IIR processing do not use the registers at the same time but rather consecutively. Further, the multiplexed FIR/IIR digital filter structure (300) can offer limit-cycle-free IIR operation using two's-complement truncation in combination with positive valued allpass coefficients.
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