Integrated delay discriminator for use with a field-programmable gate array and a method of determining a time delay thereof

摘要

An integrated delay discriminator for use with a field-programmable gate array including a reference path and a response path. The reference path is associated with a first delay of a first portion of the field-programmable gate array, and is configured to provide an event initiation marker for opening a delay measurement window. The response path is coupled to the reference path and is associated with a second delay of a second portion of the field-programmable gate array. The response path is configured to provide an event termination marker for closing the delay measurement window that was opened by the reference path. This allows a time delay determination measurement between the first portion and the second portion of the field-programmable gate array.