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Communication bus architecture for interconnecting data devices using space and time division multiplexing and method of operation
Communication bus architecture for interconnecting data devices using space and time division multiplexing and method of operation
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机译:使用空分和时分复用互连数据设备的通信总线体系结构和操作方法
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摘要
There is disclosed, for use in a communication device, such as an access concentrator, that performs high-speed data transfers between a group of M data drivers and a group of N data receivers, a space and time division multiplexing (STDM) bus interface in which each bus line is a single source/multidrop line that connects the output of only one driver to multiple receivers (i.e., a 1:N configuration). The disclosed invention minimizes the number of data reflections on each bus line by eliminating all but one of the stubs associated with the bus drivers. The disclosed device also eliminates a single point or failure situation. The bus interface also provides additional robustness by means of a “back-up” bus line that is coupled to alternate outputs on all data drivers and to inputs on all receivers (i.e., multisource/multidrop or M:N configuration).
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