Microprocessor including memory for storing set value used to select and executive instruction after completing exception handling caused by exception request

摘要

A control section sets a value 1 to a first flip-flop when a core executes a halt instruction. An OR circuit halts to output the clock. When the detection section detects an occurrence of the exception request, the control section copies the value 1 of the first flip-flop to a second flip-flop and then sets the value 0 to the first flip-flop to restart the supply of the clock to the core through the circuit. When detecting that the value 1 is set in the second flip-flop, the core judges that the state of the core was in the halt state when the exception request occurred, the core returns to the halt state after the completion of the exception handling by executing the halt instruction. When the second flip-flop does not store the value 1, the core executes an instruction next to the address of the halt instruction.