Method and apparatus for implementing fault detection and correction in a computer system that requires high reliability and system manageability

摘要

Embodiments of the present invention provide a method and apparatus for implementing fault detection and correction in a computer network. In one embodiment, the invention may provides a multi-stage watch-dog timer to monitor device operation in a computer system. A system bus controller may receive data related to a computer system fault from the multi-stage watch-dog timer and may log the fault data in memory. The system bus controller may also forward the fault data to an external server. In an alternative embodiment, the invention provides a processor that may re-set the multi-stage watch-dog timer at pre-determined intervals during normal operation. In yet another alternative embodiment, the processor may receive an interrupt from the watch-dog timer if at least one stage of the multi-stage watch-dog timer is not re-set during the fault and the processor may further run a diagnostic test to find the fault.