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Microcomputer having built-in phase locked loop circuit synchronized with external clock and detecting an interruption of the external clock by utilizing continuous outputs of the PLL circuit
Microcomputer having built-in phase locked loop circuit synchronized with external clock and detecting an interruption of the external clock by utilizing continuous outputs of the PLL circuit
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机译:具有与外部时钟同步的内置锁相环电路并利用PLL电路的连续输出来检测外部时钟的中断的微型计算机
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摘要
In the microcomputer with a phase-locked loop (PLL) circuit incorporated, a counter is cleared when an edge detection signal of an edge detector which receives an externally generated clock signal from outside and detects an edge of the clock signal, performs a count operation of an internal clock signal output from the PLL circuit as a count source, and output a count value. When the count value of the counter exceeds a predetermined set value, the PLL incorporated microcomputer detects that the externally generated clock signal has been interrupted, and outputs an external clock stop detection signal.
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