首页> 外国专利> SELF ALIGNED SHALLOW TRENCH ISOLATION WITH IMPROVED COUPLING COEFFICIENT IN FLOATING GATE DEVICES

SELF ALIGNED SHALLOW TRENCH ISOLATION WITH IMPROVED COUPLING COEFFICIENT IN FLOATING GATE DEVICES

机译:浮动门设备的自校正浅沟槽隔离和改进的耦合系数

摘要

The invention provides the method for on substrate, making floating gate N-type semiconductor N device and the device of making thus with surface (2).This method comprises: formation comprises dielectric film (4) on substrate surface, the lamination of the first floating gate material layer (6) and sacrificial material layer (8), pass this lamination and in substrate (2), form at least one isolated area (18), the first floating gate material layer (6) has top surface and sidewall (26) thus, remove expendable material (8), stay the cavity (20) that the top surface by the isolated area (18) and the first floating gate material layer (6) limits thus, and with second floating gate material layer (22) cavity filling (20), the first floating gate material layer (6) and the second floating gate material layer (22) form floating gate (24) jointly thus.
机译:本发明提供了一种在衬底上制造浮栅N型半导体N器件的方法及其表面(2)的制造方法。该方法包括:在衬底表面上形成包括介电膜(4)的第一层的层压。浮栅材料层(6)和牺牲材料层(8)经过此层压并在基板(2)中形成至少一个隔离区域(18),第一浮栅材料层(6)具有顶面和侧壁(因此,如图26所示,移除消耗性材料(8),并保留由隔离区域(18)和第一浮栅材料层(6)限制的顶表面所限制的空腔(20),并保留第二浮栅材料层(22)在空腔填充(20)中,第一浮栅材料层(6)和第二浮栅材料层(22)因此共同形成浮栅(24)。

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