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Circuit and method for determing the phase difference between a sample clock and a sampled signal by linear approximation
Circuit and method for determing the phase difference between a sample clock and a sampled signal by linear approximation
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机译:通过线性逼近确定采样时钟和采样信号之间的相位差的电路和方法
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摘要
A phase-calculation circuit (46) includes a buffer (42), an approximation circuit (70), and an interpolator (56). The buffer receives and stores first and second samples of a periodic signal having a peak amplitude. The approximation circuit (70) linearly approximates a portion of the periodic signal, and calculates the relative phase of one of the samples within the signal portion. The interpolator (56) calculates the absolute phase of that sample with respect to a predetermined point of the signal using the relative phase and the values of the first and second samples. The circuit is used to decrease the alignment-acquisition time of a digital timing-recovery loop, and allows a shortening of the preamble and a corresponding increase in the data-storage density of a disk. The circuit may determine an initial phase difference between a disk-drive read signal and a read-signal sample clock. The digital timing-recovery circuit uses this phase difference to provide an initial coarse alignment between the read signal and the sample clock and reduces the overall alignment-acquisition time.
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