Memory-efficient leaky bucket policer for traffic management of asynchronous transfer mode data communications

摘要

A method and system for policing Asynchronous Transfer Mode (ATM) traffic, or for performing traffic shaping under ATM protocol, are disclosed. The disclosed system may be implemented into an ATM hub (22), ATM switches (24, 28), or in network routers (30), at which either a User-to-Network or Node-to-Network interface is present. Parameter memory (38) in scheduling circuitry (34) of these devices stores a difference field value (TAT-L)*, limit field value L*, and increment field value I for each virtual channel being handled. The difference field value (TAT-L)* is stored using fewer bits than used by a global timer (54) to monitor global time and represent arrival time of cells, and both the difference field value (TAT-L)* and the limit field value L* are stored as two's complements of their actual value. Periodic resetting, to zero, of the difference field value (TAT-L)* is carried out by circuitry (60, 62), upon a determination that the least significant portion of the global time is later than the difference field value (TAT-L)* of the channel. Circuitry (64) implements a leaky bucket algorithm to determine whether arrived cells are conforming, using the reduced bit width representations of the difference field value (TAT-L)* in parameter memory (38).