Measurement architecture to obtain performance characteristics in packet-based networks

摘要

An architecture for measurement of per-hop, one-way delay includes a input observation circuit (24) at the input interface of a node (12) and a output observation circuit (26) at the output interface (16) of a node (12). The input observation circuit (24) copies and time stamps the headers of incoming packets, and filters packets according to an aggregate definition. Similarly, the output observation circuit (26) copies and time stamps the headers of outgoing packets, and filters packets according to the aggregate definition. The incoming and outgoing traces are correlated to calculate a delay measurement. A packet loss measurement uses input observation circuits (72a and 72b) at the input interfaces (14) of upstream and downstream nodes (20 and 22) and an output observation circuit 74 at the output interface (16) of the upstream node. The observation circuits (72a, 72b and 74) determine the number of lost packets across a node and between nodes, according to an aggregate definition.