首页> 外国专利> METHOD OF MANUFACTURING AN INTEGRATED CIRCUIT, INTEGRATED CIRCUIT OBTAINED IN ACCORDANCE WITH SAID METHOD, WAFER PROVIDED WITH AN INTEGRATED CIRCUIT OBTAINED IN ACCORDANCE WITH THE METHOD, AND SYSTEM COMPRISING AN INTEGRATED CIRCUIT OBTAINED BY MEANS OF THE METHOD

METHOD OF MANUFACTURING AN INTEGRATED CIRCUIT, INTEGRATED CIRCUIT OBTAINED IN ACCORDANCE WITH SAID METHOD, WAFER PROVIDED WITH AN INTEGRATED CIRCUIT OBTAINED IN ACCORDANCE WITH THE METHOD, AND SYSTEM COMPRISING AN INTEGRATED CIRCUIT OBTAINED BY MEANS OF THE METHOD

机译:制造集成电路的方法,根据所述方法获得的集成电路,包括根据该方法获得的集成电路的晶片,以及一种包括通过该方法的手段获得的集成电路的系统

摘要

The invention relates to a method of manufacturing an integrated circuit (404) on a die (402), wherein the die (402) forms a detachable part of a wafer (401) comprising a plurality of dies that are separated from each other by dicing lanes (403). The method comprises a step of applying a metallization pattern (407) in at least one of the dicing lanes (403) to form a communication bus comprising at least one communication bus circuit (405) that is part of the integrated circuit (404). Said step is followed by a step wherein the integrated circuit (404) is tested according to a predetermined testing method which uses the communication bus circuit (405) to communicate with the integrated circuit (404). This step is followed by a next step wherein the die (402) is detached from the wafer (401). The communication bus circuit (405) is designed so as to communicate in a wafer test mode as well as in a functional mode. During the testing of the integrated circuit (404), it communicates in the wafer test mode. The invention also relates to an integrated circuit (404) obtained by means of the manufacturing method, a wafer (401) comprising an integrated circuit (404) obtained by means of the manufacturing method, and a system comprising an integrated circuit (404) obtained by means of the manufacturing method.
机译:本发明涉及在管芯( 402 )上制造集成电路( 404 )的方法,其中管芯( 402 )形成集成电路。晶片( 401 )的可拆卸部分,其中包括多个通过切割道( 403 )彼此分离的管芯。该方法包括以下步骤:在至少一个划片通道( 403 )中施加金属化图案( 407 )以形成包括至少一个通信总线电路的通信总线。 ( 405 )是集成电路( 404 )的一部分。所述步骤之后是根据预定的测试方法对集成电路( 404 )进行测试的步骤,该预定的测试方法使用通信总线电路( 405 )与集成电路进行通信。电路( 404 )。该步骤之后是下一步骤,其中将晶片( 402 )与晶片( 401 )分离。通信总线电路( 405 )设计为可以在晶片测试模式下以及在功能模式下进行通信。在测试集成电路( 404 )期间,它以晶圆测试模式进行通信。本发明还涉及通过该制造方法获得的集成电路( 404 ),包括集成电路( 404 的晶片( 401 )。 >)以及通过该制造方法获得的包括集成电路( 404 )的系统。

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