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CENTER CONTROL SYSTEM FOR COLLECTING AND PROCESSING RAILWAY VEHICLE CONTROL DATA BY USING FIP
CENTER CONTROL SYSTEM FOR COLLECTING AND PROCESSING RAILWAY VEHICLE CONTROL DATA BY USING FIP
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机译:使用FIP采集和处理铁路车辆控制数据的中心控制系统
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摘要
PURPOSE: A center control system for collecting and processing railway vehicle control data by using an FIP is provided to form a centralized control system by integrating various kinds of control units. CONSTITUTION: A center control system for collecting and processing railway vehicle control data by using an FIP includes a CPU(101), a program storage unit(102), a data storage unit(103), a serial link control unit(104), a PCMCIA card control unit(105), a first 32-bits input/output control unit(111), a first FIP decoder(112), a first FIP input unit(112-1), a second FIP decoder(113), a first FIP output unit(113-1), a second 32-bits input/output control unit(121), a third FIP decoder(122), a second FIP input unit(122-1), a fourth FIP decoder(123), and a second FIP output unit(123-1). The CPU(101) processes an input and an output signal, controls input/output units, and FIP communication units. The program storage unit(102) stores necessary programs. The data storage unit(103) stores data. The serial link control unit(104) performs RD-232 communication with a user. The PCMCIA card control unit(105) performs a downloading process by using a PCMCIA card. The first 32-bits input/output control unit(111) controls input/output units and communication units to perform the FIP communication. The first FIP decoder(112) is used for converting FIP data frame signals to 32-bits data. The first FIP input unit(112-1) controls levels of FIP signals. The second FIP decoder(113) is used for converting the 32-bits data to the FIP data frames. The first FIP output unit(113-1) changes the FIP data frames to final transmitting signals. The second 32-bits input/output control unit(121) controls the input/output units and the communication units to perform the FIP communication. The third FIP decoder(122) is used for converting FIP data frame signals to 32-bits data. The second FIP input unit(122-1) controls the levels of the FIP signals. The fourth FIP decoder(123) is used for converting the 32-bits data to the FIP data frames. The second FIP output unit(123-1) changes the FIP data frames to final transmitting signals.
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