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PB bus interface logic with system of ISA bus

机译:PB总线与ISA总线系统的接口逻辑

摘要

PURPOSE: A PB(Parallel Bus) bus interface logic with a system using an ISA(Industry Standard Architecture) bus is provided to additionally configure an ISA interface logic for transceiving data through the ISA bus from a motherboard or an external device having the built-in ISA bus, so as to temporarily store a transceived PB message in a queue and to process the message. CONSTITUTION: A subscriber board(100) connected to a subscriber for providing a service comprises a motherboard(110) having an ISA bus I/O port connected to the subscriber board(100) and also having an internal CPU. An ISA bus I/O port connector(120) connects an ISA bus I/O port controller(111) of the motherboard(110) with the subscriber board(100), and an ISA interface logic(130) connected with the ISA bus I/O port connector(120) for transceiving a PB message with a system. A control board(200) comprises a CPU(210) arranged internally, a receiving controller(220) receiving the PB message transmitted from the subscriber board(100), and a transmission controller(230) transmits the PB message to the system.
机译:用途:PB(并行总线)总线接口逻辑与使用ISA(行业标准体系结构)总线的系统一起提供,以另外配置ISA接口逻辑,以便通过ISA总线从具有内置功能的主板或外部设备收发数据在ISA总线中,以便将收发的PB消息临时存储在队列中并处理该消息。构成:连接到用户以提供服务的用户板(100)包括母板(110),该母板具有连接到用户板(100)的ISA总线I / O端口,还具有内部CPU。 ISA总线I / O端口连接器(120)将主板(110)的ISA总线I / O端口控制器(111)与订户板(100)连接,并将ISA接口逻辑(130)与ISA总线连接。 I / O端口连接器(120),用于与系统收发PB消息。控制板(200)包括内部布置的CPU(210),接收从订户板(100)发送的PB消息的接收控制器(220),以及发送控制器(230)将PB消息发送到系统。

著录项

  • 公开/公告号KR100451792B1

    专利类型

  • 公开/公告日2004-10-08

    原文格式PDF

  • 申请/专利权人

    申请/专利号KR20010079649

  • 发明设计人 김진형;

    申请日2001-12-15

  • 分类号H04Q3/10;

  • 国家 KR

  • 入库时间 2022-08-21 22:46:32

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