Delay-locked loop circuit for periodic input signal phase matching has filter stage that only alters filtered phase signal state if different state detected for defined number of successive cycles

摘要

The delay-locked loop or DLL circuit (1) has a regulating unit (3) with a filter stage (8) for providing a filtered phase signal (FP) to the regulating unit during a transient phase, whereby the filter stage only alters the state of the filtered phase signal if a different state of the phase signal (P) is detected relative to the filtered phase signal for a defined number of successive signal cycles. An independent claim is also included for the following: (a) a method of phase matching of a periodic input signal.