A region based sides - table - walk - bit method and device using

摘要

A method and an apparatus for translating a virtual address (305) into a physical address (315) in a multiple region virtual memory environment. In one embodiment, a translation lookside buffer (TLB) (313) is configured to provide page table entries to build a physical address. The TLB is supplemented with a virtual hash page table (VHPT) (325) to provide TLB entries in the occurrences of TLB misses. An alternate software replacement scheme may be utilized on a per region basis instead of the default page table walk of the VHPT with a dedicated bit (311) associated with each particular region of the disclosed virtual address space. A VHPT walk is performed only if the particular bit for the particular region and a master enable bit (319) are both enabled. Otherwise, the alternate software replacement routine is performed to provide TLB replacements in the occurrences of TLB misses.