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Methods and apparatus for detecting data collision of data on a data bus in case of out-of-order memory accesses or different times of memory access execution
Methods and apparatus for detecting data collision of data on a data bus in case of out-of-order memory accesses or different times of memory access execution
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机译:用于在无序存储器访问或存储器访问执行时间不同的情况下检测数据在总线上的数据冲突的方法和装置
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摘要
A method of using bank tag registers in a multi-bank memory device to avoid background operation collision is described. A memory controller includes a plurality of bank registers, each of which is associated with one of a plurality of memory banks, wherein a bank register is arranged to store information, a bank number, a bank status, and a bank counter for a particular bank. The memory controller further includes an adjustable bank comparator coupled to each bank register. The memory controller receives an incoming system address request, which includes a requested bank number. The requested bank number is used to configure the adjustable bank comparator with the particular bank operating characteristics, to locate the bank register, and to determine the bank status and the bank entry status of the requested memory bank. The requested memory bank is accessed when the bank entry status identifies the requested memory bank as open.
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