System operable in either architecture reconfiguration mode or processing mode depending on the contents of a frame header

摘要

Reconfigurable signal processing architecture includes a reconfigurable data processing module in which data is input to the module in a packet frame structure including configuration frames and processing frames. Each frame includes a header having at least one mode selection bit indicating whether the frame contains reconfiguration data or processing data. The module is operable in a reconfiguration mode or a processing mode according to the content of the frame header.