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METHOD OF PERFORMING MONTE CARLO SIMULATION TO PREDICT FAILURE IN SUPERPOSITION OF INTEGRATED CIRCUIT

机译:在集成电路叠加中执行蒙特卡洛模拟预测故障的方法

摘要

PPROBLEM TO BE SOLVED: To provide a method of predicting failure in the superposition of circuit structures formed on adjacent layers through the lithography of a semiconductor wafer. PSOLUTION: The present method includes: providing a designed structure of circuit sections to be formed on one or a plurality of adjacent layers of a semiconductor wafer through lithography; and predicting the shape and positioning of every circuit section on the each of the adjacent layers through the use of one or a plurality of predetermined values with regard to a process variation or a positioning deviation error. Further, the present method determines the superposed dimensions of predicted shapes and predicted positionings of the circuit sections, compares the determined superposed dimensions to the theoretical minimum values, and decides whether or not the predicted superposed dimensions are improper. The above-described steps are repeated regarding the provided designed structure using different values of process variations and positioning deviation errors, decides whether or not the predicted superposed dimensions are improper, and further a report of a measure of improperness is provided as an output. PCOPYRIGHT: (C)2005,JPO&NCIPI
机译:

要解决的问题:提供一种通过半导体晶片的光刻来预测在相邻层上形成的电路结构的叠加中的故障的方法。解决方案:本方法包括:提供通过光刻形成在半导体晶片的一个或多个相邻层上的电路部分的设计结构;通过使用一个或多个关于过程变化或定位偏差误差的预定值,来预测每个电路部分在每个相邻层上的形状和位置。此外,本方法确定电路部分的预测形状和预测位置的叠加尺寸,将所确定的叠加尺寸与理论最小值进行比较,并确定预测叠加尺寸是否不合适。关于所提供的设计结构,使用不同的工艺变化值和定位偏差误差来重复上述步骤,确定预测的重叠尺寸是否不合适,并且进一步提供不适当的措施的报告作为输出。

版权:(C)2005,JPO&NCIPI

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