PROCESSOR SYSTEM, DMA CONTROL CIRCUIT, DMA CONTROL METHOD, CONTROL METHOD FOR DMA CONTROLLER, IMAGE PROCESSING METHOD, AND IMAGE PROCESSING CIRCUIT

摘要

PPROBLEM TO BE SOLVED: To prevent an increase in a processing burden on a host processor 1 even if a plurality of DMACs 31 are provided. PSOLUTION: A processor system comprises a plurality of arithmetic units 27 capable of parallel arithmetic processing, memories for storing data used in the arithmetic processing by the plurality of arithmetic units 27, a DMA control circuit 3 for starting the plurality of DMACs 31, and interface parts 4 to 6 for various peripheral circuits. A TPU 22 for controlling the plurality of DMACs 31 is provided separately from the host processor 1, and the TPU 22 can control the DMACs 31 and start the arithmetic units 27 to reduce a processing burden on the host processor 1. The DMACs 31 and arithmetic units 27 can be started even with an event other than a DMA transfer end notification to provide DMA transfer of a higher degree of freedom. PCOPYRIGHT: (C)2005,JPO&NCIPI