A data processing apparatus comprises at least one source processor core (110), at least two destination processor cores (120), a message handler (130) and a bus arrangement (150) providing a data communication path between the source core, the destination cores and the message handler. The message handler (130) has plurality of message-handling modules (132-1 to 132-3). At least one of the message-handling modules has a message receipt indicator that is modifiable by each of the destination processor cores to indicate that a message has been received at its destination. This message-handling module also has a transmission completion detector operable to detect, in dependence upon a message receipt indicator value that a message has been received by all of the at least two destination processor cores and to initiate transmission of an acknowledgement signal to the source processor core.
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