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Heterogeneous parallel multithread processor (HPMT) with shared contexts
Heterogeneous parallel multithread processor (HPMT) with shared contexts
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机译:具有共享上下文的异构并行多线程处理器(HPMT)
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摘要
The invention relates to a heterogeneous parallel multithread processor (1) with shared contexts which has a plurality (M) of parallel-connected standard processor root unit types (2p; pε[1, . . . , M]), where each respective standard processor root unit type (2p) has at least one or more (K) parallel-connected standard processor root units (2pq; qε[1, . . . , K]) for instruction execution of program instructions from various threads (T), each standard processor root unit type (2p) having N local context memories (32pt) which each buffer-store part of a current processor state for a thread. The multithread processor (1) also has a plurality (N) of global context memories (3t; tε[1, . . . , N]) which each buffer-store part of a current processor state for a thread, and a thread control unit (4) which can connect any standard processor root unit (2pq) to any global context memory (3t).
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机译:本发明涉及一种具有共享上下文的异构并行多线程处理器( 1 B>),其具有多个(M)并行连接的标准处理器根单元类型( 2 B> p Sub>;pε[1,...,M]),其中每个标准处理器根单元类型( 2 B> p Sub>)至少具有一个或多个(K)个并行连接的标准处理器根单元( 2 B> pq Sub>;qε[1,...,K]),用于执行来自各个线程(T的程序指令) ),每个标准处理器根单元类型( 2 B> p Sub>)具有N个本地上下文存储器( 32 B> pt Sub>),其中线程的当前处理器状态的每个缓冲区存储部分。多线程处理器( 1 B>)还具有多个(N)全局上下文存储器( 3 B> t Sub>;tε[1,...,... N]),每个缓冲区都为线程存储当前处理器状态的一部分,以及一个可以连接任何标准处理器根单元( 2 B>)的线程控制单元( 4 B>) pq Sub>)到任何全局上下文内存( 3 B> t Sub>)。
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