Method for validating simulating results of a system and equivalence comparison of digital circuits based on said method

摘要

The invention creates a technology for validating simulation results. The quickly growing number of components in modern complex systems often necessitates the introduction of abstractions, that render said systems manageable. However the abstractions, which often are based simplified assumptions, may impair the simulation results. The automatic post-processing method according to the invention safeguards the validity of the result. In most cases this can be reached, without restoring the complete description, which generally is too complex. The method, which is described for the validation of calculated counter-examples in an equivalence comparison of digital circuits can be used in all other applications, that allow for an analagous formalization of the abstraction step.