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SRAM system having very lightly doped SRAM load transistors for improving SRAM cell stability and method for making the same
SRAM system having very lightly doped SRAM load transistors for improving SRAM cell stability and method for making the same
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机译:具有用于改善SRAM单元稳定性的非常轻掺杂的SRAM负载晶体管的SRAM系统及其制造方法
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摘要
A static random access memory (SRAM) cell is given increased stability and latch-up immunity by fabricating the PMOS load transistors of the SRAM cell to have a very low drain/source dopant concentration. The drain/source regions of the PMOS load transistors are formed entirely by a P−− blanket implant. The PMOS load transistors are masked during subsequent implant steps, such that the drain/source regions of the PMOS load transistors do not receive additional P-type (or N-type) dopant. The P−− blanket implant results in PMOS load transistors having drain/source regions with dopant concentrations of 1e17 atoms/cm3 or less. The dopant concentration of the drain/source regions of the PMOS load transistors is significantly lower than the dopant concentration of lightly doped drain/source regions in PMOS transistors used in peripheral circuitry.
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机译:通过将静态随机存取存储器(SRAM)单元的PMOS负载晶体管制造为具有非常低的漏极/源极掺杂剂浓度,可以提高其稳定性和抗闩锁性。 PMOS负载晶体管的漏极/源极区完全由P-毯子注入形成。在后续的注入步骤期间,将PMOS负载晶体管掩蔽,以使PMOS负载晶体管的漏极/源极区域不接收其他P型(或N型)掺杂剂。 P-毯子注入会导致PMOS负载晶体管的漏极/源极区的掺杂浓度为1e17原子/ cm 3 Sup>或更低。 PMOS负载晶体管的漏极/源极区的掺杂剂浓度明显低于外围电路中使用的PMOS晶体管中的轻掺杂漏极/源极区的掺杂剂浓度。
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