Optimized production of hardware from source programs involving multiplications

摘要

A method of compiling a source program to produce hardware is provided. The method includes the steps of carrying out data flow analysis of the source program to produce a data flow representation of the source program, where the data flow representation includes a number of multipliers each arranged to accept first and second input arguments having first and second input bit widths respectively, and to produce an output having a bit width; optimizing the data flow representation so that the input and output bit widths are minimised, even if this results in them being different for some or all of the multipliers; and carrying out high level synthesis on the optimised data flow representation, including sharing functional units between the multipliers in such a way that the area of silicon required to produce the functional units is minimised, even if this results in the functional unit input and output bit widths being different.