首页> 外国专利> Cache coherence directory eviction mechanisms for modified copies of memory lines in multiprocessor systems

Cache coherence directory eviction mechanisms for modified copies of memory lines in multiprocessor systems

机译:用于多处理器系统中的内存行修改副本的高速缓存一致性目录逐出机制

摘要

Cache coherence directory eviction mechanisms are described for use in computer systems having a plurality of multiprocessor clusters. Interaction among the clusters is facilitated by a cache coherence controller in each cluster. A cache coherence directory is associated with each cache coherence controller identifying memory lines associated with the local cluster which are cached in remote clusters. The cache coherence controller is operable to initiate eviction of an entry in its directory corresponding to a modified copy of a memory line by sending a request to merge an empty data field with the modified copy of the memory line to a corresponding memory controller.
机译:描述了用于具有多个多处理器集群的计算机系统中的高速缓存一致性目录逐出机制。每个群集中的缓存一致性控制器有助于群集之间的交互。高速缓存一致性目录与每个高速缓存一致性控制器相关联,该高速缓存一致性控制器标识与本地集群相关联的存储在远程集群中的存储线。高速缓存一致性控制器可操作为通过向相应的存储器控​​制器发送将空数据字段与存储器行的修改后的副本合并的请求,来启动其目录中与存储器行的修改后的副本对应的条目的逐出。

著录项

相似文献

  • 专利
  • 外文文献
  • 中文文献
获取专利

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号