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Bus system for master-slave device accesses, has multiple pseudo-delayer connected to controllers which delay and output access commands to slave devices for having longer latency periods

机译:用于主从设备访问的总线系统具有连接到控制器的多个伪层,这些伪延迟器将访问命令延迟并输出到从设备,以延长等待时间

摘要

A bus system and a command delivering method includes (a) delivering a first command to a first slave device, and (b) delivering a second command to a second slave device at a point in time which is less than or equal to a latency time of the second slave device in advance of the completion of data transfer according to the first command. Accordingly, preparation necessary for data transfer can begin sooner, thereby reducing idle clock cycles of a data bus.
机译:总线系统和命令传送方法包括:(a)向第一从设备传送第一命令,以及(b)在小于或等于等待时间的时间点向第二从设备传送第二命令。在根据第一命令的数据传输完成之前,第二从设备的第二存储设备。因此,可以更快地开始进行数据传输所需的准备,从而减少数据总线的空闲时钟周期。

著录项

  • 公开/公告号US6845418B2

    专利类型

  • 公开/公告日2005-01-18

    原文格式PDF

  • 申请/专利权人 JIN-SOO KIM;

    申请/专利号US20010801048

  • 发明设计人 JIN-SOO KIM;

    申请日2001-03-08

  • 分类号G06F1318;G06F13362;

  • 国家 US

  • 入库时间 2022-08-21 22:20:09

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