首页> 外国专利> Data slice circuit separating data added to a signal superposed on a video signal based on slice level

Data slice circuit separating data added to a signal superposed on a video signal based on slice level

机译:数据限幅电路,基于限幅电平分离添加到叠加在视频信号上的信号的数据

摘要

A data slice circuit capable of generating an optimal data slice level and separating data for VBI signals of different specifications, provided with a line detection circuit for detecting any line on which a VBI signal having a CRI signal is superposed and outputting a line detection pulse only during the period and detecting any line on which a VBI signal having a reference signal is superposed and outputting another line detection pulse only during that period, a window pulse generation circuit for outputting pulses changing a period of averaging the VBI signal in accordance with the detection pulses, a data slice reference voltage detection circuit for sampling and holding an average voltage of the clamped VBI signal only while the output pulses are at a high level “H”, and a data slice level generation circuit for adding a direct current voltage changed in accordance with the detection pulsed to the output voltage.
机译:能够产生最佳数据限幅电平并为不同规格的VBI信号分离数据的数据限幅电路,具有线检测电路,用于检测叠加有CRI信号的VBI信号的任何线并仅输出线检测脉冲在该时段期间,并且检测在其上叠加了具有参考信号的VBI信号的任何线路,并仅在该时段内输出另一线路检测脉冲,窗口脉冲发生电路用于输出根据检测改变平均VBI信号的时段的脉冲脉冲,数据切片参考电压检测电路,用于仅在输出脉冲处于高电平“ H”时才采样并保持钳位的VBI信号的平均电压;以及数据切片电平生成电路,用于将变化的直流电压相加根据检测脉冲输出电压。

著录项

  • 公开/公告号US6912009B2

    专利类型

  • 公开/公告日2005-06-28

    原文格式PDF

  • 申请/专利权人 TOSHIHIKO ORII;

    申请/专利号US20020092450

  • 发明设计人 TOSHIHIKO ORII;

    申请日2002-03-08

  • 分类号H04N7/00;

  • 国家 US

  • 入库时间 2022-08-21 22:20:02

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