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Acceleration of convergence rate with verified bits in turbo decoding
Acceleration of convergence rate with verified bits in turbo decoding
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机译:Turbo解码中经过验证的比特加速收敛速度
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摘要
System and method for accelerating the convergence rate of turbo decoding by verifying bits in data frames whose CRC shows no bit errors. Verified bits are translated to bound nodes on a trellis of nodes representing a sequence of bits of the encoded code block. Verification of all bits signals a stop condition and decoding iterations can be terminated. Further, state transition metrics are limited when a node is adjacent to a bound node, allowing for acceleration of convergence by elimination of impossible state transitions. Also disclosed is a scheme to detect bit errors when the code block contains unframed data or partial data frames. This bit error detection scheme uses a recursive encoder to establish end node status. The end node state determination accelerates convergence rate recognition when incorporated with other stop conditions.
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