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INTEGRATION SCHEME FOR AVOIDING PLASMA DAMAGE IN MRAM TECHNOLOGY

机译:避免内存技术中等离子体损伤的集成方案

摘要

A method of fabricating a magnetic memory device and a magnetic memory device structure. A buffer insulating layer is deposited over the top surface of the conductive hard mask of a magnetic memory cell. The buffer insulating layer is left remaining over the conductive hard mask top surface while the various material layers of the device are patterned and etched. The buffer insulating layer prevents the conductive hard mask top surface from being damaged during plasma-containing processes.
机译:一种制造磁存储器件的方法和磁存储器件结构。缓冲绝缘层沉积在磁存储单元的导电硬掩模的顶表面上方。在图案化和蚀刻器件的各种材料层的同时,将缓冲绝缘层保留在导电硬掩模顶表面上。缓冲绝缘层防止导电硬掩模顶表面在包含等离子体的过程中损坏。

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